17thInternational Conference on VLSI (VLSI 2026)

Memo

17th International Conference on VLSI (VLSI 2026) November 27 ~ 28, 2026, Zurich, Switzerland https://dppr2026.org/vlsi/index SCOPE17th International Conference on VLSI (VLSI 2026) will provide an excellent international forum for sharing knowledge and results in theory, methodology and applications of VLSI. Original, unpublished papers, describing research in the general area of VLSI are solicited. Both theoretical and experimental research results are welcome in the following areas, but are not limited to. The conference focuses on all technical and practical aspects of high performance computing, green computing, pervasive computing, cloud computing etc. Authors are solicited to contribute to the conference by submitting articles that illustrate research results, projects, surveying works and industrial experiences that describe significant advances in the areas of Computer Science, Engineering and Applications. Topics of interest VLSI Design Analog, Digital and Mixed Signal ICs RF, mmWave and THz Circuits Low Power and Energy Efficient Design High Performance and HPC Circuits Analog AI and In Sensor Computing Compute in Pixel Architectures Computer Aided Design (CAD) AI Driven Physical Design Autonomous EDA Agents Generative EDA Models EDA Foundation Models AI Driven Analog Layout Automation Lithography Aware Design High NA EUV Co Design Testing and Testability Reliability, Aging and Variability AI Accelerator Reliability Fault Tolerance and Resilient Architectures Post Silicon Validation AI Driven Yield Optimization Hardware Security and Trusted Computing Side Channel and Fault Injection Resistance AI Enhanced Side Channel Analysis ML Driven Hardware Attacks Secure SoCs, Crypto Accelerators and PUFs Chiplet Supply Chain Security Emerging Technologies Carbon Nanotube, Graphene and 2D Materials Spintronics, TFETs and Novel Transistors Quantum and Cryogenic CMOS Cryo CMOS for Quantum Control Superconducting Logic and SFQ Circuits Photonic and Optoelectronic Circuits Photonic AI Accelerators Optical Neural Networks Chiplet Based Architectures 3D IC and TSV Integration Monolithic 3D Integration Microfluidic and Liquid Cooled 3D ICs Thermal Mechanical Co Design Backside Power Delivery Networks RISC V Hardware and SoCs Wafer Scale AI Systems AI/ML Hardware Accelerators Hardware for LLMs and Foundation Models Memory Centric LLM Accelerators Sparse and Low Precision AI Hardware Emerging Memory Technologies In Memory Computing AI Optimized Memory Hierarchies Near Memory AI Processing LLM Centric Memory Subsystems High Bandwidth Interconnects and NoCs VLSI for Communications and 6G VLSI for Video, Imaging and Vision VLSI for Security and Cryptography VLSI for Sensor Networks and IoT Biomedical and Wearable VLSI Green Semiconductor Manufacturing Carbon Neutral Chip Design Energy Efficient Packaging Paper Submission Authors are invited to submit papers through the conference Submission System by August 16, 2026. Submissions must be original and should not have been published previously or be under consideration for publication while being evaluated for this conference. The proceedings of the conference will be published by Computer Science Conference Proceedings in Computer Science & Information Technology (CS & IT) series (Confirmed). Selected papers from VLSI 2026, after further revisions, will be published in the special issues of the following journals. International Journal of VLSI Design & Communication Systems (VLSICS) Signal & Image Processing : An International Journal (SIPIJ) International Journal of Embedded Systems and Applications (IJESA) International Journal of Computer Science & Information Technology (IJCSIT)– INSPEC Indexed Indexed Information Technology in Industry (ITII) Important Dates Submission Deadline : August 22, 2026 Authors Notification : October 24, 2026 Registration & Camera-Ready Paper Due : October 31, 2026 Contact UsHere’s where you can reach us : This email address is being protected from spambots. You need JavaScript enabled to view it. (or) This email address is being protected from spambots. You need JavaScript enabled to view it.